A computer system 10, as shown in FIG. 1, includes several components that are collectively used by a user to perform various functions such as, for example, preparing and generating a document with a word processor application. With the computer system 10, the user may input data to a computing portion 12 using peripheral devices such as a keyboard 14 or a mouse 16. Data may also be provided to the computing portion 12 using data storage media (e.g., a floppy disk or a CD-ROM (not shown)). The computing portion 12, using memory and other internal components, processes both internal data and data provided to the computing portion 12 by the user to generate data requested by the user. The generated data may be provided to the user via, for example, a display device 18 or a printer 20. The computing portion 12 of a computer system typically includes various components such as, for example, a power supply, disk drives, and the electrical circuitry required to perform the necessary and requested operations of the computer system.
As shown in FIG. 2, the computing portion 12 may contain a plurality of circuit boards 22, 24, 26, 28 (e.g., printed circuit boards (PCBs) or printed wiring boards (PWBs)) on which various circuit components are implemented. For example, a computing portion designed to have enhanced sound reproducing capabilities may have a circuit board dedicated to implementing circuitry that specifically operate to process data associated with the reproduction of sound.
In FIG. 2, the components of exemplary circuit board 22 are shown. A crystal oscillator 30 provides a reference of time to various integrated circuits (ICs) 32, 34, 36, 38, 40, 42 (e.g., application specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), microprocessors, logic gates) that are connected to the circuit board 22. The integrated circuits 32, 34, 36, 38, 40, 42 communicate with one another, i.e., pass data, using wires or traces of conductive material (e.g., copper (shown, but not labeled)) embedded in the circuit board 22.
The design of an integrated circuit, such as any of the ones described with reference to FIG. 2, may be broken down into several steps. Referring now to FIG. 3, in a first step ST30, the overall architecture and behavior of the integrated circuit is designed. In a next step ST32, a specification of the design's high-level functionality is typically expressed at the register-transfer level (RTL) using a hardware description language (HDL). RTL description (also known as “register transfer logic”) is a description of an integrated circuit in terms of data flow between registers, which store information between clock cycles in the integrated circuit. The RTL description specifies what and where this information is stored and how it is passed through the integrated circuit during its operation.
After describing the design's high-level functionality, the function design of the integrated circuit is implemented into gate level logic ST34. Such implementation may be performed using, for example, logic synthesis electronic design automation (EDA) software. Then, in a next step ST36, the logical design is implemented into physical components representing transistors and their interconnecting wires. Such physical implementation may be performed using routing and placement EDA software. After the physical design is completed, the design is released for subsequent manufacture and production of the integrated circuit ST38.
After each of the steps described above, verification is typically performed to ensure that the step was performed correctly. Generally, such verification involves testing the integrated circuit design over various combinations of input, internal, and process constraints. As integrated circuits continue to become more complex over time, the need for proper verification of such integrated circuits is becoming increasingly important.
Verification of the behavioral, RTL, and logic design steps is typically heavily reliant on the use of simulation tools to predict the functional response of the design to specified input values. These input values or tests are typically specified manually by the designer and provided as input to a logic simulator together with the corresponding design description.
The vast majority of “bugs” are introduced during the implementation of the RTL design from the behavioral specification. It is during this phase that it is especially important to comprehensively test aspects of the design. A typical technique for a simulation-based verification process involves creating a test plan to target parts of the design that need to be tested. The test plan includes, for example, details of how a circuit block will be verified. Such details may relate to describing the signals and/or properties that are to verified, whether simulation will occur, and whether directed or random test vectors will be used.
The properties that the design needs to adhere to are added as assertions in the design. Along with these assertions, cover directives may also be added to the design to identify all parts of an RTL design that need to be exercised by the simulation. Simulations are targeted to exercise, or “cover,” these assertions and cover directives. For this, directed test cases are written manually or test cases are generated randomly. In other words, the behavioral models or properties of a design may be verified during the simulation of directed or random vectors.
Directed test cases require manually inserting code into the design description to test the aspects of the design. However, it is increasingly difficult to write test cases for testing each and every aspect of the design. Such an endeavor may prove to be extremely tedious and time-consuming.
Random tests involve generating millions of test vectors for verifying the design. While random testing saves some of the time otherwise needed to manually write directed tests, random testing, at least in one respect, is inefficient relative to directed tests in that with random tests, certain aspects of the design may not be verified. In other words, with random tests, certain properties of the design may be left uncovered.